Advantages and disadvantages of mealy - moore state machine, Computer Engineering

What are the advantages and disadvantages of Mealy and Moore state machine?

Advantage and Disadvantage of Mealy and Moore state machine:

In Mealy as the output variable is a function both state and input, changes of state of the state variables will be delayed regarding to changes of signal level into the input variables, there are possibilities of glitches appearing within the output variables.

Moore overcomes glitches like output dependent onto only states and not the input signal level. All of the conceptions can be applied to Moore-model state machines since any Moore state machine can be implemented like a Mealy state machine, though the converse is not accurate.

Moore machine: the outputs are properties of states themselves... that implies that you obtain the output after the machine reaches an exacting state, or to get some output your machine has to be taken to a state that gives you the output. The outputs are held till you go to some other state

Mealy machine: Mealy machines provide you outputs instantaneously, that is instantly upon receiving input, but the output is not held after which clock cycle.

Posted Date: 9/13/2013 5:14:35 AM | Location : United States







Related Discussions:- Advantages and disadvantages of mealy - moore state machine, Assignment Help, Ask Question on Advantages and disadvantages of mealy - moore state machine, Get Answer, Expert's Help, Advantages and disadvantages of mealy - moore state machine Discussions

Write discussion on Advantages and disadvantages of mealy - moore state machine
Your posts are moderated
Related Questions
In a frame transmission, CRC stands for? CRC stands for Cyclic Redundancy Check, in a frame transmission.

Sixth Generation (1990 - ) This  generation  begun  with  many  gains  in  parallel  computing,  both  in  hardware area and in improved understanding of how to build up algori

Q. What is Master Clock Signal in Control Unit? The Master Clock Signal: This signal causes micro-operations to be executed in a square. In a single clock cycle either a single

State the structure of Verilog code you follow? A good template for your Verilog file is shown below. // timescale directive tells the simulator the base units and precision

The disadvantage of specifying parameter during instantiation are: -  This has a lower precedence when compared to assigning using defparam.

Determine the hardware for multiplication The hardware for multiplication consists of equipment given in Figure. The multiplier is stored in register and its sign in Q . The se

Define swapping.  A process needs to be in memory to be implemented. Though a process can be swapped temporarily out of memory to a backing store and then brought back into mem

What does the swapping system do if it identifies the illegal page for swapping? If the disk block descriptor does not have any record of the faulted page, then this causes the

Massively Parallel System Refers to a parallel computer system having a great number of processors. The number in a great number of keeps increasing and currently it means more

MIPS' native assembly code only has two branch instructions, beq and bne, and only one comparison instruction, slt. Using just these three instructions (along with the ori instruct