Construct the truth table of a 1-bit full adder

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Reference no: EM13262020

1. Are there any static-0 hazards in the following circuits? If so, how would you fix them? Draw the fixed circuit.
(a) F(W,X,Y,Z) = (W+X+Z')(Z+Y)(Y'+X')

2. Half Adder:
(a) Construct the truth table of a half adder.
(b) Draw the circuit of the half adder.
(c) State the number of gate delays before the output is stable in the above circuit.

3. Full Adder:
(a) Construct the truth table of a 1-bit full adder.
(b) Using the block diagram of a 1-bit full adder, construct a 5-bit ripple carry adder
(d) State the number of gate delays before the output is stable in the above circuit.

4. Decoder:
(a) Show the truth table of a 3-input-8-output binary decoder (without enable logic).
(b) Construct a 3-input-8-output binary decoder using NOT, AND and OR gates (without enable logic)
(c) Using the above decoder, design the following logic function. Add the required gates and re-draw the decoder.
F(a,b,c) = Sabc (1,0,3,6,7)

Reference no: EM13262020

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